1. Field of the Invention
The present invention relates to a bus control device.
2. Description of the Related Art
In general, a technique of sharing a single bus among a plurality of types of bus devices complying with different protocols is known. For example, Japanese Patent Laid-Open No. 2003-334780 discloses a system in which a bus device which complies with a PCI protocol specification and a ROM (Read-Only Memory) which does not comply with the PCI protocol specification are connected to a PCI bus serving as a common bus. The common bus is selectively connected to a ROM bus which complies with the ROM or another PCI bus through a multiplexer. Then, the multiplexer connects the ROM bus to the common bus when the ROM which is connected to the common bus is to be accessed through the ROM bus (ROM mode). On the other hand, the multiplexer connects the PCI bus to the common bus when the bus device which is complied with the PCI protocol and which is connected to the common bus through the PCI bus is to be accessed (PCI mode). Note that in the system disclosed in Japanese Patent Laid-Open No. 2003-334780, when operation is performed in the ROM mode, occurrence of access conflict in the common bus between the ROM and the PCI device is prevented by stopping supply of a clock signal to the PCI device.
However, in the system disclosed in Japanese Patent Laid-Open No. 2003-6143, arbitration for avoiding the conflict between the PCI device and the ROM which does not comply with the PCI protocol and which is connected to the PCI bus serving as the common bus is required to be performed. Therefore, the bus device connected to the PCI bus should have an arbiter capable of performing arbitration with the ROM in addition to arbitration among PCI devices. In general, since PCI bus devices have respective arbiters used to arbitrate accesses among the PCI bus devices, if extra arbiters are added to the PCI bus devices, lack of versatility occurs and cost is increased.